FPGA implementation of dual-microphone delay-and-sum beamforming for in-car speech enhancement and recognition

In an automotive environment, the performance of a speech recognition system is affected by environmental noise if the speech signal is acquired directly from a microphone. Speech enhancement techniques are therefore necessary to improve the speech recognition performance. In this paper, a field-programmable gate array (FPGA) implementation of dual-microphone delay-and-sum beamforming (DASB) for speech enhancement is presented. As the first step towards a cost-effective solution, the implementation described in this paper uses a relatively high-end FPGA device to facilitate the verification of various design strategies and parameters. Experimental results show that the proposed design can produce output waveforms close to those generated by a theoretical (floating-point) model with modest usage of FPGA resources. Speech recognition experiments are also conducted on enhanced in-car speech waveforms produced by the FPGA in order to compare recognition performance with the floating-point representation running on a PC. (a) For the covering entry of this conference, please see ITRD abstract no. E217711.

  • Authors:
    • YE, H
    • HIMIWAN, I
    • MASON, M
  • Publication Date: 2009-3


  • English

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  • Accession Number: 01143895
  • Record Type: Publication
  • Source Agency: ARRB
  • Files: ITRD, ATRI
  • Created Date: Nov 16 2009 12:12PM