A HARDWARE IMPLEMENTATION OF THE ATCRBS REPLY PROCESSOR USED IN DABS

A special-purpose digital hardware processor, which implements the ATCRBS Reply Processing algorithms designed for use in the Discrete Address Beacon System (DABS) has been developed and used in two DABS-related programs. This report gives a detailed functional description of this processor as implemented by Lincoln Laboratory. With minor modifications it could serve as the ATCRBS Reply Processor for a Beacon Collision Avoidance System. (Author)

• Corporate Authors:

  Massachusetts Institute of Technology

  Linclon Laboratory, 244 Wood Street
  Lexington, MA  United States  02420-9180
• Authors:
  • Nelson, R G
  • Nuckols, J H
• Publication Date: 1977-9-19

Media Info

• Pagination: 57 p.

Subject/Index Terms

• TRT Terms: Algorithms; Analog to digital converters; Coding systems; Crash avoidance systems; Digital computers; Mode S; Multiplexing; Pulse generators; Pulse modulation; Signal processing
• Uncontrolled Terms: Decoding
• Old TRIS Terms: Digital systems; Discrete address beacon systems; Monopulse radar; Pulse communications; Sidelobes; Video signals
• Subject Areas: Operations and Traffic Management;

Filing Info

• Accession Number: 00169239
• Record Type: Publication
• Source Agency: National Technical Information Service
• Report/Paper Numbers: ATC-78, FAA-RD-77-92
• Contract Numbers: DOT-FA72WAI-261,, F19628-76-C-0002
• Files: NTIS
• Created Date: Feb 16 2002 12:00AM