SOLVING COMPLEX NAVIGATION SYSTEM ISSUES WITH NEW TECHNOLOGY

A single chip microcontroller is being designed for high end vehicle navigation systems. Advanced methods of chip design make it possible to create an industry specific device. A core processor can be surrounded by a useful selection of peripherals. The core processor is a member of the Power personal computer (PC) family. It is a reduced instruction set computer (RISC) device that offers very high performance at moderate cost. The high performance will support new navigation system features that are not practical today. On the same chip will be peripheral function units that will support navigation system needs. A 32 bit wide system bus is used for parallel input/output on the chip. A controller supports off-chip memory, and a multichannel controller supports efficient data movement between system devices. External gyros, compasses, and accelerometers can be simply interfaced to the RISC processor by serial channels. Data from radio receivers and user inputs can similarly be received by serial channels. The output data from the GPS receiver logic can be sent to the RISC processor via serial or parallel paths. Serial or parallel paths can be used to send/receive data to a controller. The RISC processor can be used to create complex display images that are sent via the parallel bus to a display controller. Because of the high processing power of the RISC processor, speech synthesis and speech recognition can be accomplished by less complicated peripheral chips. Typical older navigation systems can be simplified by using one high performance RISC central processing unit, thus reducing expensive system components and total cost. This paper describes the requirements of advanced, futuristic navigation/GPS systems. It discusses the challenges of designing, manufacturing, and marketing these complex systems, and how future integrated processors can help to address these issues.

  • Supplemental Notes:
    • Five volumes of papers and one volume of abstracts comprise the published set of conference materials.
  • Corporate Authors:

    VERTIS

    TORANOMOM 34 MORI BUILDING 1-25-5
    TORANOMON, MINATOKU, TOKYO 105  Japan 
  • Authors:
    • Le, C H
    • Shoap, S
  • Conference:
  • Publication Date: 1995-11

Language

  • English

Media Info

  • Pagination: p. 591

Subject/Index Terms

Filing Info

  • Accession Number: 00721145
  • Record Type: Publication
  • Report/Paper Numbers: Volume 2
  • Files: TRIS
  • Created Date: May 27 1996 12:00AM