THE NAVY'S NEW STANDARD DIGITAL SIGNAL PROCESSOR - THE AN/UYS-2

An architectural summary of the AN/UYS-2 multi-processor digital signal processor is presented along with a brief description of the major technologies that are being incorporated into it. Discussion concentrates upon the AN/UYS-2's implementation of data-flow parallel processing to achieve exceptionally high computing throughput rates. In addition, its functional components and the implementation of its hardware functional elements into standard electronic modules are discussed. Supporting this multi-processor architecture is a signal processing graph language methodology called Processing Graph Methodology (PGM) which is used to efficiently and cost-effectively program the AN/UYS-2. Follow-on candidate technologies for infusion into the AN/UYS-2 are highlighted.

• Supplemental Notes:
  • ASE and NSSC Annual Technical Symposium, 27th; Challenges of the Nineties - Accomplishing more with less; 23 May 1990, Arlington, Va, USA, paper 9 [18 p, 2 ref, 10 fig]
• Authors:
  • Rice, M L
• Publication Date: 1990

Language

• English

Subject/Index Terms

• TRT Terms: Signal processing
• Old TRIS Terms: Defence technology
• Subject Areas: Marine Transportation;

Filing Info

• Accession Number: 00698599
• Record Type: Publication
• Source Agency: British Maritime Technology
• Files: TRIS
• Created Date: Aug 14 1995 12:00AM