FAIL-SAFE RAPID-TRANSIT ENGINEERING ENSURES RELIABILITY, PASSENGER SAFETY
A new fail-safe computer system - the Fail-Safe 86 - will soon be installed in 45 stations of the Bay Area Rapid Transit (BART) District, in the San Francisco Bay area. The new system architecture - which uses standard, proven industrial components combined with a versatile real-time operating system - is fault-tolerant and combines modularity with reliability. The new Fail Safe 86 microcomputer software architecture and the Integrated Control System (ICS) are described.
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Availability:
- Find a library where document is available. Order URL: http://worldcat.org/issn/08634989
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Corporate Authors:
McGraw-Hill, Incorporated
330 West 42nd Street
New York, NY United States 10036 -
Authors:
- Kravetz, G A
- Publication Date: 1984-5
Media Info
- Pagination: p. 152-154
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Serial:
- Electronics
- Volume: 57
- Issue Number: 10
- Publisher: VNU BUSINESS PUBLICATIONS
- ISSN: 0863-4989
Subject/Index Terms
- TRT Terms: Applications; Automatic train protection; Computer architecture; Fail safe systems; Information processing; Microprocessors; Modular structures; Rapid transit; Signaling; Software
- Identifier Terms: San Francisco Bay Area Rapid Transit District
- Old TRIS Terms: Computers (Microprocessor); Fail safe
- Subject Areas: Operations and Traffic Management; Public Transportation; Research;
Filing Info
- Accession Number: 00389796
- Record Type: Publication
- Source Agency: Engineering Index
- Files: TRIS
- Created Date: Oct 30 1984 12:00AM